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Wideband CMOS Amplifier Design: Time-Domain Considerations

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3 Author(s)
Walling, J.S. ; Dept. of Electr. Eng., Washington Univ., Seattle, WA ; Shekhar, S. ; Allstot, D.J.

Time-domain responses of wideband CMOS amplifiers using several inductive peaking techniques are presented. Transient performance considerations are described, including the effects of transistor parasitics on settling and edge rates. A combination of time-and frequency-domain performance is derived for a given bandwidth extension technique, and tradeoffs are discussed. Measured results for several high-speed high-gain single-stage amplifiers are presented in 0.18-mum CMOS, and a design strategy for multistage amplifiers is introduced. Finally, design and simulation results are presented for a multistage amplifier in 0.18-mum CMOS that attains a bandwidth of 22.7 GHz with 14.7-dB voltage gain, operates at 40 Gb/s, and consumes 93.6 mW.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:55 ,  Issue: 7 )