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Memory model effects on application performance for a lightweight multithreaded architecture

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4 Author(s)
Sheng Li ; Dept. of Electr. Eng., Univ. of Notre Dame, Notre Dame, IN ; Kuntz, S. ; Kogge, P. ; Brockman, J.

In this paper, we evaluate the effects of a partitioned global address space (PGAS) versus aflat, randomized distributed global address space (DGAS) in the context of a lightweight multithreaded parallel architecture. We also execute the benchmarks on the Cray MTA-2, a multithreaded architecture with a DGAS mapping. Key results demonstrate that distributing data under the PGAS mapping increases locality, effectively reducing the memory latency and the number of threads needed to achieve a given level of performance. In contrast, the DGAS mapping provides a simpler programming model by eliminating the need to distribute data and, assuming sufficient application parallelism, can achieve similar performance by leveraging large numbers of threads to hide the longer latencies.

Published in:

Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on

Date of Conference:

14-18 April 2008