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A Programmable SIMD Vision Chip for Real-Time Vision Applications

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4 Author(s)
Wei Miao ; State Key Lab. for Superlattices & Micro- Struct., Chinese Acad. of Sci., Beijing ; Qingyu Lin ; Wancheng Zhang ; Nan-Jian Wu

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 times 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 times 16 PE array is fabricated by the 0.18 standard CMOS process. It has a pixel size of 30 mum times 40 mum and 8.72 mum W power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:43 ,  Issue: 6 )