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This paper presents a model to evaluate the impact of substrate noise on a CMOS regenerative comparator and on a flash A/D converter. The proposed approach initially relates substrate noise with the induced timing uncertainty of the comparator. Subsequently, the obtained expression for the timing uncertainty is used to derive a generalized expression for the SNR reduction in flash A/D converters, relating the resulting SNR directly to substrate noise. The developed approach is validated on a 10-bit flash A/D and is utilized to investigate performance degradation of practical converters.