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CMOS technology is evolving deeper and deeper into the nanometer era, which makes the integration of entire systems possible, many of which are mixed-signal in nature, including analog and/or RF parts. This demands for efficient automated synthesis techniques for these analog circuits that include the variability of the circuit parameters. A technique is presented for the efficient yield optimization of analog circuits based on evolution-generated yield models. A hierarchical optimization method is described that optimizes complex circuits based on combining Pareto-optimal performance models in a bottom-up way. Finally, an evolution-based method for the true architectural synthesis of analog systems is presented. This is illustrated with several examples.