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Property Specification and Static Verification of UML Models

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3 Author(s)
Siveroni, I. ; Dept. of Comput., City Univ., London ; Zisman, A. ; Spanoudakis, G.

We present a static verification tool (SVT), a system that performs static verification on UML models composed of UML class and state machine diagrams. Additionally, the SVT allows the user to add extra behavior specification in the form of guards and effects by defining a small action language. UML models are checked against properties written in a special-purpose property language that allows the user to specify linear temporal logic formulas that explicitly reason about UML components. Thus, the SVT provides a strong foundation for the design of reliable systems and a step towards model-driven security.

Published in:
Availability, Reliability and Security, 2008. ARES 08. Third International Conference on

Date of Conference: 4-7 March 2008

Page(s):
96 - 103
Print ISBN:
978-0-7695-3102-1
INSPEC Accession Number:
10007067
Conference Location :
Barcelona
Digital Object Identifier :
10.1109/ARES.2008.194
Product Type:
Conference Publications

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