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Advanced method to monitor design-process marginality for 65nm node and beyond

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6 Author(s)
Liu, H. ; Adv. Metrol. Dept., CRD Adv. Modules, Milpitas, CA ; Huang, C. ; Tzou, S.F. ; Young, C.
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We proposed a novel method (DBB: designed based binning) by using design and defect inspection information to detect marginal design features. This method was used to identify a pattern failure problem (hammer head) which occurred during production early ramp (65 nm device). The traditional approach could not detect this hammerhead problem due to the intermittent nature and low defect count. This problem was identified by DBB methodology which showed problem root cause as a combination of lithography process conditions drift and marginal OPC issues. This use case proved that by using DBB to identify weak pattern features, it provides a common platform for designer, OPC and process engineer to communicate and identify design related problems faster. This method has helped integration engineer shorten process development time, supported product engineer to ramp new product faster and enabled defect engineer to detect excursion earlier. Overall, advanced manufacturing fab will achieve higher yield by adopting this.

Published in:

Advanced Semiconductor Manufacturing Conference, 2008. ASMC 2008. IEEE/SEMI

Date of Conference:

5-7 May 2008

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