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A 1V 16.9ppm/°C 250nA Switched-Capacitor CMOS Voltage Reference

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4 Author(s)
Hong-Wei Huang ; Taipei, Nat. Taiwan Univ., Taipei ; Chun-Yu Hsieh ; Ke-Horng Chen ; Sy-Yen Kuo

We have developed a switched-capacitor CMOS voltage reference (SCVR). The circuit is shown in Fig. 24.3.2 and is composed of a low-power bias circuit [G. De Vita and G. iannacone, 2007], a core circuit and a switched-capacitor difference amplifier that is insensitive to op-amp offset voltage. The clock signals (phi1, phi2, phi2') are non-overlapping to prevent leakage. The core circuit supplies Vgs1 and Vgs2 to the switched-capacitor difference amplifier on phases phi1 and phi2, respectively. The difference amplifier then generates an output, which has a low TC, based on the gate-source voltage difference, AVGS.

Published in:

Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International

Date of Conference:

3-7 Feb. 2008