A Single-Chip CMOS Radio SoC for v2.1 Bluetooth Applications

This paper presents a Bluetooth v2.1 compliant SoC that integrates all functions of a Bluetooth radio. The transceiver comprises a two-point modulated fractional-N synthesizer, a polar transmitter, and a 500 kHz IF receiver with minimal analog filtering. The radio architecture is chosen to minimize overall die area as well as power consumption for both the basic and enhanced data rates. The SoC is implemented in a standard 0.13 mum digital CMOS technology with a die area of 9.2 mm
²
, of which only 3.0 mm
²
is occupied by the analog and RF blocks. The basic-rate radio draws a total supply current of 29.7 mA in the receive mode and 29.4 mA in the transmit mode.