Referenced Items are not available for this document.
This paper presents preliminary results of a radio chip design, implemented in a standard 90 nm CMOS process, which provides significant platform cost reduction by fully integrating the LNAs and high efficiency Class-AB PAs (and their matching networks) in a 1x2 scheme for 802.11a/g/n protocols.
Published in:
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Date of Conference: 3-7 Feb. 2008
- Page(s):
- 356 - 619
- Print ISBN:
- 978-1-4244-2010-0
- INSPEC Accession Number:
- 10047913
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/ISSCC.2008.4523204
- Product Type:
- Conference Publications
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