By Topic

A 0.6-to-10GHz Receiver Front-End in 45nm CMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)

Wireless communication is evolving towards multi-standard terminals that handle various standards including those for cellular, WLAN and WPAN applications. Software-defined radios (SDR) are being considered as a likely platform to build tomorrow's handsets. The receiver in such radios can be tuned over a wide range of frequencies and can support multiple modulation schemes. Consequently, broadband receivers with good linearity and noise performance over a wide band are needed. The digital part of an SDR will dominate the silicon area, mandating the use of advanced CMOS technologies. The analog/RF circuitry is preferably integrated on the same die as the digital part. This paper describes a fully integrated broadband receiver front-end in 45nm baseline CMOS. A highly linear low-noise receiver covering a spectrum from below 1GHz (-3dB at 600MHz) up to 10GHz, including the WiMedia ultra-wideband (UWB) spectrum is demonstrated.

Published in:

Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International

Date of Conference:

3-7 Feb. 2008