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A 2Mpixel 1/4-inch CMOS Image Sensor with Enhanced Pixel Architecture for Camera Phones and PC Cameras

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5 Author(s)

This paper presents performance data for a second-generation, 2Mpixel, 1/4-inch CMOS image sensor with state-of-the-art pixel technology that targets camera phones, PC cameras, PDAs and other portable devices. Continuous improvements in pixel design have enabled smaller pixels to be used without compromising performance. This sensor incorporates the latest pixel technology and enables higher performance than previous generations with the same optical format. The sensor uses a fully symmetric common-element pixel architecture (CEPA) with 2.5 equivalent transistors per pixel along with internal control of a reset transistor to maximize quantum efficiency and enable additional process improvement. The die size is also significantly smaller than the previous generation, simplifying the design process and enabling smaller modules. The sensor is also compatible with standard mobile imaging architecture (SMIA) requirements, which simplifies camera module design.

Published in:

Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International

Date of Conference:

3-7 Feb. 2008