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A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences

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2 Author(s)
Wang, C.C. ; Jet Propulsion Lab., Pasadena, CA, USA ; Pei, D.

A VLSI design for computing exponentiation in finite fields is developed. An algorithm to generate a relatively long pseudorandom number sequence is presented. It is shown that the period of this sequence is significantly increased compared to that of the sequence generated by the most commonly used maximal length shift register scheme

Published in:

Computers, IEEE Transactions on  (Volume:39 ,  Issue: 2 )

Date of Publication:

Feb 1990

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