Skip to Main Content
As channel conditions in wireless communications improve, the noise performance of the baseband DSP processor can be degraded to save power without compromising bit error rate. The degradation of baseband signal noise is achieved by degrading the noise performance (reducing the wordlength and supply voltage) of the various baseband signal processing modules in specific proportions defined by a locus, that ensures minimum overall power consumption for a given channel. In the presence of intra-die process variations, this locus is determined by the delay/leakage parameters of each baseband module. In our approach, a path oscillation test applied to each module is used to select the "best" locus of choice and an EVM driven feedback loop is used to dynamically modulate the wordlength/power consumption of each module as dictated by this locus to minimize power and modulate baseband SNR across a range of channel conditions.
VLSI Test Symposium, 2008. VTS 2008. 26th IEEE
Date of Conference: April 27 2008-May 1 2008