Skip to Main Content
The design of a 2.45-GHz near-field RF identification (RFID) system with passive on-chip antenna (OCA) tags is very challenging as the efficiency of RF power conversion is very low. It poses multidisciplinary research challenges such as ultra-low-power circuits design, semiconductor process technology, and integrated antenna design. This paper describes the designs of such an RFID system, the reader, and OCAs, as well as the passive tag integrated circuits in detail. The passive tag chip with 128-bit nonvolatile memory has been realized using CMOS 0.13- technology. The OCA is fabricated on top of the chip using post-processing technology. The complete RFID tag with an integrated OCA is smaller than 0.5- with a thickness of 0.1 mm. With the reader generating an output power of 0.5 W, the RFID system is able to perform with RF read/write functions at a distance of .