Temperature-Adaptive Energy Reduction for Ultra-Low Power-Supply-Voltage Subthreshold Logic Circuits

Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply-voltages. Speed of subthreshold logic circuits is enhanced with an increase in the die temperature. The excessive timing slack observed in the clock period of constant-frequency subthreshold logic circuits at elevated temperatures provides new opportunities to lower the active mode energy consumption. Temperature-adaptive dynamic supply voltage tuning technique is proposed in this paper to enhance the high temperature energy efficiency of ultra-low-voltage subthreshold logic circuits. Results indicate that the energy consumption of subthreshold logic circuits can be lowered by up to 40% by dynamically scaling the supply voltage without degrading the clock frequency at elevated temperatures.