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Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes

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5 Author(s)
Jose Carlos S. Palma ; PPGC - II - UFRGS, Av. Bento Gonçalves, 9500, Porto Alegre, RS - Brazil. ; Leandro S. Indrusiak ; Fernando G. Moraes ; Ricardo Reis
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This work investigates the reduction of power consumption in networks-on-chip (NoCs) through the reduction of transition activity using data coding schemes developed for bus-based systems and proposes a new coding scheme suitable for NoC-based systems. The estimation of the NoC power consumption was performed with basis on macromodels which reproduce the power consumption on each internal NoC module according to the transition activity on its input ports. Such macromodels were embedded in a system model and a series of simulations were performed, aiming to analyze the trade-off between the power savings due to coding techniques versus the power consumption overhead due to the encoding and decoding modules. The proposed coding scheme presented the best results for all of the simulated traffic patterns, when compared to other coding schemes found in the literature.

Published in:

Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on

Date of Conference:

11-14 Dec. 2007