Referenced Items are not available for this document.
The TLM modeling level of the SystemC language emphasizes the transactions in a complex system, considered at a very high level of abstraction. This level of specification considerably improves simulation performance and is therefore increasingly being adopted. We address assertion-based verification (ABV) of TLM SystemC models. We propose a framework for supervising during simulation the verification of temporal properties expressed in PSL. Very few modifications are needed in the original SystemC code. The TLM specification can be timed or not. The properties can involve several channels, of different types.
Published in:
Computers, IEEE Transactions on
(Volume:57
,
Issue:
10
)
Date of Publication: Oct. 2008
- Page(s):
- 1346 - 1356
- ISSN :
- 0018-9340
- Digital Object Identifier :
- 10.1109/TC.2008.74
- Date of Publication :
- 02 May 2008
- Date of Current Version :
- 26 August 2008
- Issue Date :
- Oct. 2008
- Sponsored by :
- IEEE Computer Society
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