By Topic

Energy-Efficient Buffer Architecture for Flash Memory

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Huang, W.T. ; Dept. of Electron. Eng., Nat. Taipei Univ. of Technol., Taipei ; Chen, C.T. ; Chen, C.H. ; Cheng, C.C.

Lower energy consumption is an important consideration in the design of mobile devices. Flash memory is essential in such applications, and one solution for reducing energy consumption is to include a buffer layer in the flash memory storage system. The traditional read/write buffer architecture is not suitable for flash memory, so we developed an optimal-read only-write buffer architecture tailored to the properties of flash memory described in this study. We propose an adaptive Grey decision policy for efficiently decrease the number of write operations to reduce energy consumption by 15% and 35% compared to the least recently used and flash-aware buffer policies, based on our optimal-read only-write buffer architecture.

Published in:

Multimedia and Ubiquitous Engineering, 2008. MUE 2008. International Conference on

Date of Conference:

24-26 April 2008