Referenced Items are not available for this document.
A video codec LSI for high-definition television (HDTV) systems has been developed. By using a time-compressed integration encoding technique, it converts a 20.0-MHz bandwidth luminance signal and two 5.0-MHz chrominance signals into a compressed image signal at 48.6-MHz sampling frequency. It is useful in many HDTV application systems, such as 400-Mb/s digital transmission system, a video disk player system, or an analog transmission system. Over 288000 elements, including a 52-kb one-transistor DRAM (dynamic random access memory) line memory specially developed for this LSI, were integrated on a 12.16×12.10-mm2 chip. A standard cell layout method and a 1.2-μm CMOS logic LSI process were used
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:24
,
Issue:
6
)
Date of Publication: Dec 1989
- Page(s):
- 1656 - 1661
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 3605892
- Digital Object Identifier :
- 10.1109/4.45002
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Dec 1989
- Sponsored by :
- IEEE Solid-State Circuits Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
