A multistandard rate adapter coprocessor chip, designed for use in ISDN terminal adapters and U-interface modems, is presented. It provides a compact, low-power protocol converter to connect asynchronous (up to 19200 b/s) and synchronous (up to 64 kb/s) data terminal equipment with any digital 64-kb/s network. The multistandard rate adapter chip was developed in a 2-μm CMOS technology using a hierarchical design methodology. The rate adapter is the cornerstone of a 144-kb/s U-interface modem and a major breakthrough for the next-generation multistandard terminal adapter
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:24
,
Issue:
6
)
Date of Publication:
Dec 1989
- Page(s):
-
1625
-
1633
- ISSN :
-
0018-9200
- INSPEC Accession Number:
-
3605888
- Digital Object Identifier :
-
10.1109/4.44998
- Date of Current Version :
-
06 August 2002
- Issue Date :
-
Dec 1989
- Sponsored by :
-
IEEE Solid-State Circuits Society