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An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H

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2 Author(s)
M. Ishikawa ; NTT LSI Lab., Kanagawa, Japan ; T. Tsukahara

An 8-b video-rate subranging analog-to-digital (A/D) converter with pipelined wideband sample-and-hold (S/H) amplifiers is described. The chip architecture is based on a newly developed subranging technique that combines a digital-to-analog subconverter and a subtractor in one body. The development of a bandwidth enhancement technique for the S/H amplifier yields a wide effective resolution bandwidth using 1-μm CMOS technology. An effective resolution bandwidth of 25 MHz was achieved, as well as a small input capacitance of 1.5 pF, due to the high performance of the S/H circuit developed

Published in:

IEEE Journal of Solid-State Circuits  (Volume:24 ,  Issue: 6 )