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Implementation of Wave-Pipelined Interconnects in FPGAs

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6 Author(s)

Global interconnection and communication at high clock frequencies are becoming more problematic in FPGA. In this paper, we address this problem by presenting an interconnect wave-pipelining strategy, which utilizes the existing programmable interconnects fabrics to provide high-throughput communication in FPGA. Two design approaches for interconnect wave-pipelining, using simple clock phase shifting and asynchronous phase encoding, are presented in this paper. Experimental results from a Xilinx Virtex-5 FPGA device are also presented.

Published in:

Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on

Date of Conference:

7-10 April 2008