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A low power CMOS CORDIC processor design for wireless telecommunication

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3 Author(s)
Young Bok Kim ; Northeastern Univ., Boston ; Yong-Bin Kim ; Doyle, J.T.

A CORDIC processor for wire telecommunication is integrated in a 0.5 mum CMOS technology. The CORDIC (coordinate rotation digital computer) processor reduces the circuit complexity by performing a sequence of elementary rotations using shift and add operations without multiplications. Hard wired-logic eliminates the shifter and includes pre-calculated arctan angle values. The average power consumption is 76 mW with 50 MHz clock and 5 V power supply. The fabricated modulator consumes 24 mW at 61.44 MHz sampling rate and 5 V power supply.

Published in:

Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on

Date of Conference:

5-8 Aug. 2007

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