By Topic

A systematic system level design methodology for dual band CMOS RF receivers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
El-Nozahi, M. ; Texas A&M Univ., College Station ; Entesari, K. ; Sanchez-Sinencio, E.

A systematic system-level design methodology for dual-band RF CMOS receiver is proposed. The methodology helps the designer to find the optimum set of specifications of the receiver's building blocks for minimizing the power consumption. Our analysis is based on analytical expressions for the input referred noise, input referred third order intercept point and gain as a function of the frequency for the various blocks. This methodology is applied to a dual-band receiver for the GSM (900 MHz) and PCS (1900 MHz) standards. Simulations show that having an LNA with a constant gain behavior reduces the power consumption by 75% compared to an LNA with a decreasing gain versus frequency.

Published in:

Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on

Date of Conference:

5-8 Aug. 2007