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Structural Synthesis of Four-Quadrant Multiplier Based on Hierarchical Topology

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2 Author(s)
Xiaoying Wang ; Institute of Computer Science, University of Frankfurt, Germany. ; Lars Hedrich

This paper presents a method towards automatic structural synthesis of analog multiplier based on a hierarchical topology "super-topology", which is abstracted from the most standard four-quadrant multipliers. The essential components in the super-topology are four identical cells, which consist of several MOS-transistors and determine features and performances of multipliers. We build all possible cells within 3 transistors. Experimental results present three new multiplier structures with simulation results to show the creativity of our method.

Published in:

2008 Design, Automation and Test in Europe

Date of Conference:

10-14 March 2008