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Architecture Exploration of NAND Flash-based Multimedia Card

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3 Author(s)
Sungchan Kim ; Sch. of EECS, Seoul Nat. Univ., Seoul ; Chanik Park ; Soonhoi Ha

In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploration of such systems needs to explore a wide design space spanned by detailed architecture parameters through cycle-accurate performance estimation. For fast exploration, the proposed methodology is based on an efficient evolutionary algorithm, called QEA, and trace-driven simulation to evaluate architecture candidates quickly. We applied the proposed methodology to NAND flash-based multimedia card as a case study considering the following design parameters: buffer size, flash memory configuration, clock, communication architecture, and memory allocation. The experimental results validate the proposed methodology by showing the optimal architecture configurations with varying performance constraints and design parameters.

Published in:

Design, Automation and Test in Europe, 2008. DATE '08

Date of Conference:

10-14 March 2008