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Loopback DFT for Low-Cost Test of Single-VCO-Based Wireless Transceivers

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3 Author(s)
Srinivasan, G. ; Texas Instrum., Dallas ; Taenzler, F. ; Chatterjee, A.

This article discusses a loopback DFT test approach for RFIC chips that provides quick, economical test results at the wafer level. By performing RF testing before chip packaging, the authors reduce test cost. They show that test yield on the ATE for Texas Instruments' RFIC devices is high when this loopback DFT approach is used.

Published in:

Design & Test of Computers, IEEE  (Volume:25 ,  Issue: 2 )

Date of Publication:

March-April 2008

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