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The application of the diophantine frequency synthesis (DFS) methodology is presented and certain practical aspects of it are illustrated through the design and frequency planning of two forward DFS synthesizers each using two Integer-N phase-locked loops (PLLs). Both synthesizers achieve frequency resolution about 100 times times better that their constituent PLLs without compromising hopping speed performance or spectral purity.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:55 , Issue: 4 )
Date of Publication: April 2008