Referenced Items are not available for this document.
The application of the diophantine frequency synthesis (DFS) methodology is presented and certain practical aspects of it are illustrated through the design and frequency planning of two forward DFS synthesizers each using two Integer-N phase-locked loops (PLLs). Both synthesizers achieve frequency resolution about 100 times times better that their constituent PLLs without compromising hopping speed performance or spectral purity.
Published in:
Circuits and Systems II: Express Briefs, IEEE Transactions on
(Volume:55
,
Issue:
4
)
Date of Publication: April 2008
- Page(s):
- 374 - 378
- ISSN :
- 1549-7747
- INSPEC Accession Number:
- 9921373
- Digital Object Identifier :
- 10.1109/TCSII.2008.919499
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 15 April 2008
- Issue Date :
- April 2008
- Sponsored by :
- IEEE Circuits and Systems Society
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