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An integrated transceiver design suitable for short range wireless applications, such as RFID or the transmission of data from medical sensors, is presented. Fabricated in a standard 0.13-m CMOS process, the test chips include the transceiver, the integrated antenna, the phase-locked loop (PLL) loop filter and supply decoupling. The transmitter and receiver consist of PLLs operated in both closed- and open-loop modes. Initially closed, the transmit PLL phase locks an RF voltage-controlled oscillator (VCO), the loop is subsequently opened and the VCO is modulated to yield an FM output signal that radiates directly from the tank inductor that doubles as the integrated antenna. The closed-loop receiver phase locks an RF VCO which, in open-loop mode, is injection locked to the incoming FM signal and the PLL components serve to demodulate the signal. Averaged transmit and receive power consumptions are less than 1.1 mW, enabling on-chip ultracapacitors to serve as the power source. When one chip communicates using the on-chip antenna to another chip connected to an off-chip patch antenna the communication range is 1.8 m at 5 kb/s. The communication range can be increased at the expense of the data rate, or by using off-chip antennas with both chips.