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A high-power CMOS switch using a novel adaptive voltage swing distribution method in a multistack field-effect transistor (FET) scheme is proposed. The proposed adaptive voltage swing distribution method in multistack FETs is very effective in preventing unwanted channel formation with low control voltage supply in OFF-state FETs. This, in turn, increases power-handling capability when a large-signal voltage swing is applied. In the proposed CMOS switch, the behavior of the voltage swing in OFF-state multistack FETs shows a difference with respect to the level of input voltage swing. The characteristics of voltage swing distribution and leakage channel formation in the CMOS switch is fully analyzed with incorporation of the novel adaptive voltage swing distribution method into a three-stacked nMOS Rx switch in a standard 0.18-mum triple-well CMOS process. In addition, linearity of the proposed technique is verified through the measurement data of the single-pole double-throw switches that employ the proposed technique in the Rx switch. Two different types of configurations are implemented and characterized at the Rx switches, which consist of four-stacked nMOS devices, to demonstrate the method of minimizing voltage stress issues on one of the multistacked FETs. Layout consideration was also taken to prevent interference between leakage signals at the substrate. The measured performance of the proposed design shows an input 0.3-dB compression point of 33.5 dBm at 1.9 GHz. To the best of our knowledge, this is the highest power-handling capability of a CMOS switch in a standard CMOS process ever reported. The insertion losses of the Tx and Rx switches are 1.6 and 1.9 dB, respectively, at 1.9 GHz. The isolation of the Tx and Rx switches is around 20 and 30 dB, respectively, at 1.9 GHz.