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Effect of Boundary Conditions on the Dynamic Response Characterization Of Board-Level Drop Test

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3 Author(s)
Seungbae Park ; State Univ. of New York, New York ; Chirag Shah ; Jae Kwak

Board-level drop test has emerged as a key qualification test for assessing the impact reliability of electronic components. JEDEC standards for board level drop test address different test board designs, assembly, materials, constructions, tester setup etc. However, it fails to emphasize the effect of varying boundary conditions on the dynamic response of the PCB assembly. Repeated dropping of boards during statistical reliability testing loosens up the mounting screws after a certain number of drops. Also, different sizes, and materials of mounts and supports can produce a significant variation in the vibration response of the PCB assembly. This paper addresses the effect of such boundary conditions and their influence on the overall dynamic characteristics of the system. A novel optical technique has been developed to measure the whole-field impact dynamic response of the PCB. Pair of synchronized high-speed cameras the images of board assembly at rates upto 15,000 pictures per second. A digital image correlation (DIC) system has been integrated with the cameras to analyze the acquired images to give dynamic deformation, shape and strain over the entire surface of board during impact. These measurements are conducted for different standoff heights, varying tightening torques on mounting screws and for rubber shim placement between the support and the board. Modal analysis has been performed on the finite element model for the board assembly to validate the experimental measurements. Furthermore, using spectral analysis, quantitative evaluation of varying boundary conditions has been done to understand their effect on fundamental modes and harmonics. With significant sensitivity observed as regards to these parameters, the need for accurate accounting of the boundary conditions while analyzing a drop test has been underlined.

Published in:

Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th

Date of Conference:

10-12 Dec. 2007

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