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With the increasing requirement of thinner, higher density and multi-function product, MCP (multi-chip product) is becoming a more and more popular package used in many kinds of portable products like mobile phone, PDA, and digital camera, etc. And the miniaturization trend of these electronic products has resulted in the vulnerability of solder joint interconnections which can be reflected in board level cyclic bending test. The test was conducted according to JEDEC standard. Every 100 cycles the resistances was checked and a 10% increase in resistance was considered as a failure. The failure location depends largely on the board PCB pad structure design. It was observed that packages mounted on via in pad PCB have cracks mostly along solder/substrate pad interface area, while packages mounted on no via in pad PCB, most cracks happen at the trace neck area. And it was noticed that for via in pad and no via in pad PCB, the different effects of various DOE factors could have almost opposite influences.