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We present a bidirectional MOS resistor circuit that is electronically tunable and has zero dc offset. For a given I-V characteristic, the circuit senses the source-to-drain potential across an MOS device and automatically generates an appropriate bias for the gate terminal to implement the characteristic via negative feedback. We show that the I-V characteristic of the resistor can be designed to be linear, compressive or expansive by using appropriate translinear current mode circuits for the feedback biasing. Our technique does not require the MOS transistor to operate in the triode region and is valid in both weak and strong inversion. Experimental results from a CMOS process show that a square-root, linear, or square resistor can be implemented as examples of our topology. The linear version was tunable over a resistance range of 1 MOmega-100 GOmega in our particular implementation and exhibited proportional-to-absolute temperature (PTAT) behavior. The measured excess noise of the resistor agrees with theoretical predictions.