By Topic

A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Krishna, M.V. ; Nanyang Technol. Univ., Singapore ; Xie, J. ; Lim, W.M. ; Do, M.A.
more authors

This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.

Published in:

Biomedical Circuits and Systems Conference, 2007. BIOCAS 2007. IEEE

Date of Conference:

27-30 Nov. 2007