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Hardware in the Loop Simulation of a FPGA-based Speed and Position Observer for non-Salient Permanent Magnet Synchronous Motors

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4 Author(s)
Delli Colli, V. ; Univ. of Cassino Cassino, Cassino ; Di Stefano, R. ; Marignetti, F. ; Scarano, Maurizio

The paper investigates a FPGA implementation of a simple observer aiming to improve the speed estimation behavior and to make a step towards a SOPC PMSM drive sensor-less control. The proposed approach is based on the fast processing provided by the FPGA implementation, allowing to accurately reproduce the continuous time sliding mode and to realize high performance FIR filters. Such filters allow an accurate reconstruction of the position signal by means of phase compensation, and lead to an accurate speed estimation based on the zero-crossing detection of the commutation signals. Moreover, a fast current controller is considered. The paper focuses the whole design flow and confirms the feasibility of the approach by means of hardware in the loop simulation.

Published in:

Industrial Electronics Society, 2007. IECON 2007. 33rd Annual Conference of the IEEE

Date of Conference:

5-8 Nov. 2007