By Topic

Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Schilke, H. ; Univ. of Paderborn, Paderborn ; Rettberg, A. ; Dittmann, F.

In this work, we present a methodology for the embedded systems domain that allows the design of models for partial reconfigurable Hardware. The dynamic modifiable high-level Petri-nets are used as a specification language for this methodology. They inherently offer parallelism and are a natural choice for any hardware design. The special mechanisms- scopes and transitions with transformation rules- allow the modelling of dynamical activities.

Published in:

Electronic Design, Test and Applications, 2008. DELTA 2008. 4th IEEE International Symposium on

Date of Conference:

23-25 Jan. 2008