Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs

In this work, we present a methodology for the embedded systems domain that allows the design of models for partial reconfigurable Hardware. The dynamic modifiable high-level Petri-nets are used as a specification language for this methodology. They inherently offer parallelism and are a natural choice for any hardware design. The special mechanisms- scopes and transitions with transformation rules- allow the modelling of dynamical activities.