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A High-Speed, High-Radix, Processor Array Architecture for Real-Time Elliptic Curve Cryptography Over GF(2m)

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3 Author(s)
Fayed, M.A. ; Univ. of Victoria, Victoria ; El-Kharashi, M.W. ; Gebali, F.

This paper presents a high-radix elliptic curve cryptographic architecture that performs a scalar multiple of an elliptic curve point operations over GF(2m). The proposed architecture is based on a new algorithm, which is a modified version of the sliding window scalar multiplication algorithm. We speed-up the scalar multiplication by merging the point doubling and adding operations into a single step, which decreases the scalar multiplication critical path delay at the expense of a larger look-up table. The proposed architecture utilizes an optimized processor array-based field ALU that efficiently implements addition, squaring, multiplication and division over GF(2m). The proposed architecture is implemented for m epsiv {163, 283, 571} on a Xilinx XC4VFX100-12 device. We achieved a frequency of 253 MHz, which allows the architecture to calculate GF(2163) scalar multiplication for radix 28 in 9 mus. Our results for GF(2163) show a speed-up that ranges from 1.5 to 326 in comparison to previous FPGA implementations and a speed-up ranges from 1.1 to 5.6 in comparison to previous ASIC implementations.

Published in:

Signal Processing and Information Technology, 2007 IEEE International Symposium on

Date of Conference:

15-18 Dec. 2007

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