Scheduled System Maintenance:
Some services will be unavailable Sunday, March 29th through Monday, March 30th. We apologize for the inconvenience.
By Topic

Improved High Temperature Retention for Charge-Trapping Memory by Using Double Quantum Barriers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
5 Author(s)
Yang, H.J. ; Nat. Chiao Tung Univ., Hsinchu ; Chin, Albert ; Lin, S.H. ; Yeh, F.S.
more authors

We have fabricated the [TaN-Ir3Si]-HfAlO-LaAlO3-Hf0.3O0.5N0.2-HfAlO-SiO2-Si double quantum-barrier charge- trapping memory device. Under fast 100 mus and low plusmn8 V program/erase (P/E) condition, an initial memory window of 2.6 V and good extrapolated ten-year retention window of 1.9 V are achieved at 125degC. Very small P/E retention decays of 64/22 mV/dec at 125degC are measured due to double quantum barriers to confine the charges in deep-trapping-energy Hf0.3O0.5N0.2 well.

Published in:

Electron Device Letters, IEEE  (Volume:29 ,  Issue: 4 )