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Unity-Gain Amplifier With Theoretically Zero Gain Error

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4 Author(s)
Monsurro, P. ; Dipt. di Ing. Elettron., Univ. di Roma "La Sapienza, Rome ; Pennisi, S. ; Scotti, G. ; Trifiletti, A.

This paper presents a unity-gain amplifier architecture, which, unlike already known solutions, provides a theoretically zero gain error without requiring an infinitely large loop gain. The architecture is based on two amplifiers nested in a feedback configuration, which allows a straightforward complementary metal-oxide-semiconductor (CMOS) implementation. Performances are analytically evaluated and compared to those of the traditional solution under similar design settings. Simulations using a 0.35-mum CMOS process are found to be in agreement with theory, and Monte Carlo simulations have also shown the robustness of the proposed approach against process tolerances.

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Instrumentation and Measurement, IEEE Transactions on  (Volume:57 ,  Issue: 7 )