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Board Level Reliability of Wafer Level Chip Scale Packages With Copper Post Technology

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3 Author(s)
Jacobe, A.B. ; Analog Devices, Inc., Gen. Trias ; Lomibao, P.B. ; Jackson, J.

Thermal cycling performance of wafer level chip scale packages (WLCSP) depends on many factors: board design, assembly process and bump processes. The typical failure mode observed for this package is fracture between die and solder bump interface. To strengthen the base of the solder ball during thermal cycling, electroplated copper post was embedded on the RDL and is encapsulated in a low stress molding compound. The post increases the standoff which is believed to have better reliability. Time-to-failure, plotted in a Weibull distribution will be used to illustrate interesting and significant differences.

Published in:
Electronics Manufacturing and Technology, 31st International Conference on

Date of Conference: 8-10 Nov. 2007

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