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A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops

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3 Author(s)
Meng-Hung Shen ; Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu ; Po-Hsiang Lan ; Po-Chiun Huang

This paper presents an operational amplifier for a 1-V supply voltage. It comprises three gain stages with ac-boosting and buffered Miller feedback compensation circuits. The implementation uses a standard 0.35-mum CMOS process ( V and V). To accommodate maximum voltage headroom between power rails, a pseudo-differential structure is adopted in this amplifier. The large common-mode gain associated with the structure is suppressed by two common-mode stabilization loops. The amplifier driving 100-pF loads achieves a 4.3-MHz gain-bandwidth product. The settling time of a 1- input step signal is 1.1s. The amplifier consumes 249 muW and occupies 0.06-mm silicon area.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:55 ,  Issue: 5 )