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Architecture Exploration for Low Power Design

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2 Author(s)
Vinod Kathail ; Synfora Inc., Mountain View ; Tom Miller

This tutorial will describe in detail and demonstrate an ESL design flow for architectural exploration to determine low power designs. Increasingly SoC design is driven by integrated mobile devices such as cell phones, music players and hand-held game consoles. These devices rely on standard algorithms such as H.264, 802.1 In, or JPEG2000, which allow room for innovative implementations that can result in differentiated products. An ESL design-flow that integrates application engine synthesis with an industry-leading RTL power estimation technology, such as Sequence Power Theater, enables a designer to explore multiple algorithms and architectures with different power profiles to determine the optimal algorithm-architecture combination in a very short period of time.

Published in:

21st International Conference on VLSI Design (VLSID 2008)

Date of Conference:

4-8 Jan. 2008