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The impact of strain technology on device performnance and reliability for sub-90nm FUSI SOI MOSFETs

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3 Author(s)
Jium-Yu Chen ; Nat. Univ. of Kaohsiung, Kaohsiung ; Chen-An Wang ; Wen-Kuan Yeh

For FUSI SOI CMOSFET, the impact of high stress contact etching stop layer (CESL) SiN layer on device performance and reliability were investigated. In this work, FUSI SOI n/pMOSFET driving capability and mobility can be enhanced with high tensile and compressive CESL layer in respectively; we found that high stress CESL layer will also induced more damages especially on 90 nnm device, resulting in FUSI SOI device degradation.

Published in:

Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on

Date of Conference:

20-22 Dec. 2007