The impact of strain technology on device performnance and reliability for sub-90nm FUSI SOI MOSFETs

For FUSI SOI CMOSFET, the impact of high stress contact etching stop layer (CESL) SiN layer on device performance and reliability were investigated. In this work, FUSI SOI n/pMOSFET driving capability and mobility can be enhanced with high tensile and compressive CESL layer in respectively; we found that high stress CESL layer will also induced more damages especially on 90 nnm device, resulting in FUSI SOI device degradation.