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Simultaneous Switching Noise: The Relation between Bus Layout and Coding

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3 Author(s)
Rossi, D. ; Univ. of Bologna, Bologna ; Nieuwland, A.K. ; Metra, C.

As device geometries shrink and power supply voltages decrease, simultaneous switching noise has increasingly detrimental effects on IC reliability. The authors investigate the worst-case conditions for SSN generated by a single switching wire and analyze the impact of transition-reducing encoding on SSN. They show that switching-pattern and layout considerations have a significant impact on TRE performance.

Published in:

Design & Test of Computers, IEEE  (Volume:25 ,  Issue: 1 )

Date of Publication:

Jan.-Feb. 2008

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