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Hybrid-SBST Methodology for Efficient Testing of Processor Cores

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5 Author(s)

In this article, we introduce a hybrid-SBST methodology for efficient testing of commercial processor cores that effectively uses the advantages of various SBST methodologies. Self-test programs based on deterministic structural SBST methodologies combined with verification-based self-test code development and directed RTPG constitute a very effective H-SBST test strategy. The proposed methodology applies directed RTPG as a supplement to improve overall fault coverage results after component-based self-test code development has been performed.

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Design & Test of Computers, IEEE  (Volume:25 ,  Issue: 1 )