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This work presents a strict timing-coherent digital signal processing architecture. The fundamental requirement is that programmable events can be produced within predictable time intervals with tight accuracies (timing errors <1 ns). There are several application fields where this characteristic is essential, as in ultrasound beamforming, where the system spreads over several processing modules. The followed approach defines a modular and scalable architecture (AMPLIA), configured as a multi-branch pipeline. This arrangement guarantees timing coherence along all the system, independently of the number of processing modules. The latency introduced by every module is automatically compensated and clock synchronization is achieved by Digital Clock Managers inside FPGAs. Furthermore, AMPLIA is a very simple to use architecture, involving a 32-bit data bus and only 8 control lines. An important element of the architecture is the Interface and Control Unit (ICU). This element couples the asynchronous communications with a host computer to the strictly timing- coherent domain of the system. Besides, it automatically performs the operations of parameter programming, triggering of acquisition-processing cycles, housekeeping functions and result retrieval, all within well defined time intervals. In the beamforming application, high timing resolution is achieved in emission by clock multiplication and by Lagrange interpolation in reception. This allows operating the overall system at the lower sampling clock frequency. Dynamic focusing is performed by Progressive Focusing Correction and processing rates of several Gsamples/s are achieved.
Date of Conference: 3-5 Oct. 2007