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From Cognitive Architectures to Hardware: A Low Cost FPGA-Based Design Experience

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5 Author(s)
Lopez, I. ; Univ. Politecnica de Madrid, Madrid ; Sanz, R. ; Moreno, F. ; Salvador, R.
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This paper describes an experiment to implement a high-level, cognitive architecture on limited resources, namely, an altera cyclone/cyclone-II FPGA. It is part of a broader line of research investigating methods of scaling high-level, cognitive or "intelligent" architectures into limited resources, for building embedded systems. An artificial vision system for traffic signal detection has been implemented with neural networks, according to the principles of a BB1/AIS blackboard architecture. Different scaling techniques and reductions have been carried out for embedding the system into an FPGA. The paper offers a description of the architectural design and hardware implementation results. A discussion of modularity, possible enhancements and tradeoffs is carried out throughout the paper.

Published in:

Intelligent Signal Processing, 2007. WISP 2007. IEEE International Symposium on

Date of Conference:

3-5 Oct. 2007