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65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform

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5 Author(s)
Daeik D. Kim ; Semicond. R&D Center, IBM, Hopewell Junction, NY ; Jonghae Kim ; Choongyeun Cho ; Jean-Olivier Plouchart
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An RF and mm-wave platform developed in 65 nm SOI CMOS technology is presented. The SOI FET performance in a wired cell is measured up to fT=300 GHz and 200 GHz for NFET and PFET. Ring oscillator records 3.6 psec minimum inverter stage delay. Back-end-of-line vertical native capacitor (VNCAP) and on-chip inductor performances are reported. The performance scaling trends of mmWave PLL front-end components are presented.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008. IEEE Topical Meeting on

Date of Conference:

23-25 Jan. 2008