Scheduled System Maintenance on December 17th, 2014:
IEEE Xplore will be upgraded between 2:00 and 5:00 PM EST (18:00 - 21:00) UTC. During this time there may be intermittent impact on performance. We apologize for any inconvenience.
By Topic

Process-Tolerant Ultralow Voltage Digital Subthreshold Design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Roy, K. ; Purdue Univ., West Lafayette, IN ; Kulkarni, J.P. ; Myeong-Eun Hwang

We propose process variation tolerant circuit techniques for robust digital subthreshold design. We present an 8times8 process-tolerant FIR filter, working in both super-threshold and subthreshold regions featuring adaptive beta-ratio modulation and integrated level converters. Ultra-dynamic voltage scaling (UVDS) enables the filter operation at 85 mV consuming 40 nW. For memory applications, we propose Schmitt trigger based SRAM bitcell exhibiting built-in process variation tolerance. Functional SRAM with the proposed memory bitcell is demonstrated at 160 mV in 0.13 mum CMOS technology.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008. IEEE Topical Meeting on

Date of Conference:

23-25 Jan. 2008