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Process-Tolerant Ultralow Voltage Digital Subthreshold Design

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3 Author(s)
Roy, K. ; Purdue Univ., West Lafayette, IN ; Kulkarni, J.P. ; Myeong-Eun Hwang

We propose process variation tolerant circuit techniques for robust digital subthreshold design. We present an 8times8 process-tolerant FIR filter, working in both super-threshold and subthreshold regions featuring adaptive beta-ratio modulation and integrated level converters. Ultra-dynamic voltage scaling (UVDS) enables the filter operation at 85 mV consuming 40 nW. For memory applications, we propose Schmitt trigger based SRAM bitcell exhibiting built-in process variation tolerance. Functional SRAM with the proposed memory bitcell is demonstrated at 160 mV in 0.13 mum CMOS technology.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008. IEEE Topical Meeting on

Date of Conference:

23-25 Jan. 2008